Senior ASIC Verification Engineer

Ciena Corporation
US - California - Petaluma
June 27, 2024

Ciena is committed to our people-first philosophy. Our teams enjoy a culture focused on prioritizing a personalized and flexible work environment that empowers an individual's passions, growth, wellbeing and belonging. We're a technology company that leads with our humanity-driving our business priorities alongside meaningful social, community, and societal impact.Not ready to apply? Join our Talent Community to get relevant job alerts straight to your inbox.Why Ciena:

You will be a member of a successful team working at forefront of technological innovation focused on innovative technologies, flows and products. You will be working with, and learning from industry-recognized experts.
Our team supports an inclusive, diverse and barrier-free work environment making for empowered and committed employees.
We recognize the importance of well-being and offer programs and benefits to support and sustain the mental and physical health of our employees and their families.
Great work deserves recognition. We have a robust recognition program, with ongoing and enhanced awards for exemplary performance.

Reporting to Sr. Manager ASIC Engineering, as a Senior ASIC Verification Engineer, you will:

Develop test benches and tests for FPGAs and ASICs.
Assist in root-causing RTL bugs.
Develop verification models.
Draft detailed test plans.
Partaking in test plan and coverage analysis of the block and SOC-level verification.

The Must Haves:

Bachelor / Master or PhD degree in Electrical Engineering coupled with proven experience in ASIC development with Verilog.
Experience with ASIC design verification, synthesis, timing/power analysis and DFT.
Minimum 5 years of work experience is required in ASIC Verification, including proficiency in UVM and System Verilog.
Experience with modern SoC design architectures, ARM/MiPs type processor cores, Ethernet, Networking, and Data Communications.
Strong debug and lab experience.

Assets:

Knowledge of high-performance and low-power design techniques.
Knowledge of FPGA and emulation platforms. Knowledge of SOC architecture.
Knowledge of assertion-based formal verification.
Proficient with a scripting language like Perl.

Compensation and Benefits

The annual pay range for this position is $133,000 - $212,400 USD
The annual pay range for this position in California is $152,900 - $244,300 USD.

Pay ranges at Ciena are designed to accommodate variations in knowledge, skills, experience, market conditions, and locations, reflecting our diverse products, industries, and lines of business. Please note that the pay range information provided in this posting pertains specifically to the primary location, which is the top location listed in case multiple locations are available.

Non-Sales employees may be eligible for a discretionary incentive bonus, while Sales employees may be eligible for a sales commission. In addition to competitive compensation, Ciena offers a comprehensive benefits package, including medical, dental, and vision plans, participation in 401(K) (USA) & DCPP (Canada) with company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company-paid holidays, paid sick leave, and vacation time. We also comply with all applicable laws regarding Paid Family Leave and other leaves of absence.
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Not ready to apply? Join our Talent Community to get relevant job alerts straight to your inbox.At Ciena, we are committed to building and fostering an environment in which our employees feel respected, valued, and heard. Ciena values the diversity of its workforce and respects its employees as individuals. We do not tolerate any form of discrimination.Ciena is anEqual Opportunity Employer, including disability and protected veteran status.If contacted in relation to a job opportunity, please advise Ciena of any accommodation measures you may require.

Read the full job description and apply online on the recuiter's web-site

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