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US - CA - Temecula
April 28, 2024
Key responsibilities: 5+ years of working experience in Design verification. Pre-Silicon IP validator for USB IP The works involved subsystem-level verification. Knowledge in test plan writing, writing tests in UVM and System Verilog, Able to debug RTL issues, coverage writing and SVA, waveform...
US - CA - Newport Beach
April 28, 2024
Key responsibilities: 5+ years of working experience in Design verification. Pre-Silicon IP validator for USB IP The works involved subsystem-level verification. Knowledge in test plan writing, writing tests in UVM and System Verilog, Able to debug RTL issues, coverage writing and SVA, waveform...
US - CA - Salinas
April 28, 2024
Key responsibilities: 5+ years of working experience in Design verification. Pre-Silicon IP validator for USB IP The works involved subsystem-level verification. Knowledge in test plan writing, writing tests in UVM and System Verilog, Able to debug RTL issues, coverage writing and SVA, waveform...
US - CA - Costa Mesa
April 28, 2024
Key responsibilities: 5+ years of working experience in Design verification. Pre-Silicon IP validator for USB IP The works involved subsystem-level verification. Knowledge in test plan writing, writing tests in UVM and System Verilog, Able to debug RTL issues, coverage writing and SVA, waveform...
US - CA - Lodi
April 28, 2024
Key responsibilities: 5+ years of working experience in Design verification. Pre-Silicon IP validator for USB IP The works involved subsystem-level verification. Knowledge in test plan writing, writing tests in UVM and System Verilog, Able to debug RTL issues, coverage writing and SVA, waveform...
US - CA - La Puente
April 28, 2024
Key responsibilities: 5+ years of working experience in Design verification. Pre-Silicon IP validator for USB IP The works involved subsystem-level verification. Knowledge in test plan writing, writing tests in UVM and System Verilog, Able to debug RTL issues, coverage writing and SVA, waveform...
US - CA - Oceanside
April 28, 2024
Key responsibilities: 5+ years of working experience in Design verification. Pre-Silicon IP validator for USB IP The works involved subsystem-level verification. Knowledge in test plan writing, writing tests in UVM and System Verilog, Able to debug RTL issues, coverage writing and SVA, waveform...
US - CA - Los Angeles
April 28, 2024
Key responsibilities: 5+ years of working experience in Design verification. Pre-Silicon IP validator for USB IP The works involved subsystem-level verification. Knowledge in test plan writing, writing tests in UVM and System Verilog, Able to debug RTL issues, coverage writing and SVA, waveform...
US - CA - Hesperia
April 28, 2024
Key responsibilities: 5+ years of working experience in Design verification. Pre-Silicon IP validator for USB IP The works involved subsystem-level verification. Knowledge in test plan writing, writing tests in UVM and System Verilog, Able to debug RTL issues, coverage writing and SVA, waveform...
US - CA - Indio
April 28, 2024
Key responsibilities: 5+ years of working experience in Design verification. Pre-Silicon IP validator for USB IP The works involved subsystem-level verification. Knowledge in test plan writing, writing tests in UVM and System Verilog, Able to debug RTL issues, coverage writing and SVA, waveform...
US - CA - Apple Valley
April 28, 2024
Key responsibilities: 5+ years of working experience in Design verification. Pre-Silicon IP validator for USB IP The works involved subsystem-level verification. Knowledge in test plan writing, writing tests in UVM and System Verilog, Able to debug RTL issues, coverage writing and SVA, waveform...
US - CA - Encinitas
April 28, 2024
Key responsibilities: 5+ years of working experience in Design verification. Pre-Silicon IP validator for USB IP The works involved subsystem-level verification. Knowledge in test plan writing, writing tests in UVM and System Verilog, Able to debug RTL issues, coverage writing and SVA, waveform...