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This module present the processor organization. We will begin with a summary of processor organization. Registers, which form the internal memory of the processor, are then analyzed. We are then in a position to return to the discussion of the instruction cycle. A description of the instruction cycle and a common technique known as instruction pipelining completes our description. Understanding the organization of the CPU of computer

Processor Organization

To understand the organization of the CPU, let us consider the requirements placed on the CPU, the things that it must do:

  • Fetch instruction : The CPU reads an instruction from memory.
  • Interpret instruction : The instruction is decoded to determine what action is required.
  • Fetch data : The execution of an instruction may require reading data from memory or an I/O module.
  • Process data : The execution of an instruction may require performing some arithmetic or logical operation on data.
  • Write data : The results of an execution may require writing data to memory or an I/O module.

To do these things, it should be clear that the CPU needs to store some data temporarily. It must remember the location of the last instruction so that it can know where to get the next instruction. It needs to store instructions and data temporar­ily while an instruction is being executed. In other words, the CPU needs a small internal memory.

[link] is a simplified view of a CPU, indicating its connection to the rest of the system via the system bus. You will recall (Lecture 1) that the major components of the CPU are an arithmetic and logic unit (ALU) and a control unit (CU). The ALU does the actual computation or processing of data. The con­trol unit controls the movement of data and instructions into and out of the CPU and controls the operation of the ALU. In addition, the figure shows a minimal internal memory, consisting of a set of storage locations, called registers .

The CPU with the System Bus

[link] is a slightly more detailed view of the CPU. The data transfer and logic control paths are indicated, including an element labeled internal CPU-bus . This element is needed to transfer data between the various registers and the ALU because the ALU in fact operates only on data in the internal CPU mem­ory.

CPU Internal Structure

Register organization

Within the CPU, there is a set of registers that function as a level of memory above main memory and cache in the hierarchy. The registers in the CPU perform two roles:

  • User-visible registers : These enable the machine- or assembly-language pro­grammer to minimize main memory references by optimizing use of registers.
  • Control and status registers : These are used by the control unit to control the operation of the CPU and by privileged, operating system programs to control the execution of programs.

There is not a clean separation of registers into these two categories. For example, on some machines the program counter is user visible (e.g., Pentium), but on many it is not (e.g., PowerPC). For purposes of the following discussion, how­ever, we will use these categories.

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Source:  OpenStax, Computer architecture. OpenStax CNX. Jul 29, 2009 Download for free at http://cnx.org/content/col10761/1.1
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